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Pc-concepts SHG2 DP User Manual Page 26

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Processor and Chipset Intel® SHG2 DP Server Board Technical Product Specification
Intel Order Number C11343-001 Revision 1.0
14
2.5 Chipset Support Components
2.5.1 Legacy I/O (Super I/O) National* PC87417VLA
The National* PC87417VLA is integrated on the SHG2 baseboard as the Super I/O controller
(SIO). The SIO is a Plug and Play-compatible device with ACPI-compliant controller/extender.
The SIO provides support for the following features:
•
The system real-time clock (RTC)
•
Two serial ports
•
One parallel port
•
Floppy disk controller
•
PS/2-compatible keyboard and mouse controller
•
Gereral purpose I/O (GPIO) pins
•
Plug and Play functions
•
Power management controller
The SHG2 baseboard provides the connector interface for the floppy, dual serial ports, parallel
port, PS/2 mouse, and the PS/2 keyboard. See Section 8 (Connections) for connector pinout
information. Upon reset, the SIO reads the values on GPO pins to determine its boot-up
address configuration.
2.5.1.1 Serial Ports
One 9-pin connector in a D-Sub housing is provided for serial port A, while serial port B is
optional via cable to the rear of the chassis through a 9-pin connector. Both ports are
compatible with 16450 and 16550A modes, and both are re-locatable. Each serial port can be
set to one of four different COM-x ports, and each can be enabled separately. When enabled,
each port can be programmed to generate edge- or level-sensitive interrupts. When disabled,
serial port interrupts are available to add-in cards. The serial port pinout is shown in Table 3.
Table 3. Serial Port Connector Pinout
Pin Name Description
1 DCD Data Carrier Detected
2 RXD Receive Data
3 TXD Transmit Data
4 DTR Data Terminal Ready
5 GND Ground
6 DSR Data Set Ready
7 RTS Request to Send
8 CTS Clear to Send
9 RIA Ring Indication Active
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