Pc-concepts SHG2 DP User Manual Page 31

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Intel® SHG2 DP Server Board Technical Product Specification Baseboard PCI I/O Subsystem
Revision 1.0 Intel Order Number C11343-001
19
3.2.2 64/100MHz PCI-X Arbitration
A 64/100MHz segment supports three PCI (-X) masters: slots PCIX-1 (64/100), PCIX-2
(64/100), and 82544GC Gigabit Ethernet Controller. All PCI (-X) masters must arbitrate for PCI
(-X) access, using resources supplied by the CIOB-X2. The host bridge PCI (-X) interface
(CIOB-X2) arbitration lines REQx* and GNTx* are a special case in that they are internal to the
host bridge. Table 11 defines the arbitration connections.
Table 11. 64/100MHz Segment Arbitration Connections
Baseboard Signals Device
P1_REQN1/P1_GNTN1 64/100MHz Slot PCIX-1 (64/100)
P1_REQN0/P1_GNTN0 64/100MHz Slot PCIX-2 (64/100)
P1_REQN2/P1_GNTN2 82544GC Gigabit Ethernet Controller
3.2.3 82544GC Gigabit Ethernet Controller
The Intel 82544GC Gigabit Ethernet Controller is an integrated third-generation Ethernet LAN
component capable of providing 1000, 100, and 10 Mbps data rates. It is a single-chip device,
containing both the MAC and PHY layer functions.
The 82544GC utilizes a 64 bit, 100 MHz direct interface to the PCI-X bus, compliant with the
PCI Local Bus Specification, Revision 1.0a.
3.3 64-bit/133MHz PCI-X Subsystem
A 64/133 MHz segment supports these embedded devices and connectors:
One dual channel Ultra 160 SCSI controller—Adaptec AIC7899 SCSI controller.
Note: The AIC7899 is a PCI device, when enabled; the PCI expansion slot connector is
limited to running at 66 MHz in PCI mode.
One 184-pin, 3.3 V, 64-bit PCI (-X) expansion connector, numbered PCIX-6 (64/133).
3.3.1 Device IDs (IDSEL)
The PCI (-X) IDSEL signal connections to S1 AD[31::11] lines for 64/133 MHz devices are
shown in Table 12.
Table 12. 64/133MHz Segment Configuration IDs
IDSEL Value Device
24 PCI (-X) Slot #6, PCIX-6 (64/133)
25 7899 or 7902 SCSI Controller
3.3.2 64/133MHz Segment Arbitration
A 64/133 MHz segment supports three PCI (X) masters: slot PCIX-6 (64/133), 7899 SCSI
controller, and the CIOB-X2 controller. All PCI (-X) masters must arbitrate for PCI (X) access
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